1. Field of the Invention
The invention relates to a memory cell, and more particularly to a monolithic static memory cell.
2. Description of the Prior Art
Static random access memory (RAM) cells are known which consist of a plurality of field effect transistors constructed in metal-insulator-semiconductor (MIS) technology integrated on a semiconductor body. In this regard, reference may be taken to the book of Luecke, Mize and Carr, "Semiconductor Memory Design and Application", McGraw-Hill Kogakusha Ltd., Tokyo, pp. 117-119. For the realization of such a memory cell, a part of a boundary surface of a semiconductor body corresponding to the plurality of field effect transistors must be made available. On the other hand, dynamic single transistor memory cells integrated on a semiconductor body are known (cf. IEEE Journal of Solid State Circuits, Vol. SC-7, No. 5, October 1972, pp. 336-340) which require a significantly smaller part of the boundary surface but which, however, must be operated in such a manner that the digital information stored therein must be periodically read, regenerated and rewritten. Even upon reading of the stored information, a regeneration of the information is required.